Jan 10, 2006 #1 N narasimha_80 Newbie level 5 Joined Nov 29, 2005 Messages 8 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,368 tco tpd Hello, 1. Can any body write to me what exaclty tco and tpd in flip flops ? 2. What is the relation( formula) between fmax, tsu,th,negative and positive clock skews in FPGA ? Best Regards, Narasimha Naik
tco tpd Hello, 1. Can any body write to me what exaclty tco and tpd in flip flops ? 2. What is the relation( formula) between fmax, tsu,th,negative and positive clock skews in FPGA ? Best Regards, Narasimha Naik
Jan 10, 2006 #2 A anjali Full Member level 3 Joined Aug 16, 2005 Messages 173 Helped 14 Reputation 28 Reaction score 6 Trophy points 1,298 Activity points 3,033 tsu tco tpd th tpd - propagatinal delay tco - combinational delay to satisfy setup conditions, Tclk >= Tsu + Tco,max + Tcq to satisfy hold conditions, Th > Tcq + Tco,min
tsu tco tpd th tpd - propagatinal delay tco - combinational delay to satisfy setup conditions, Tclk >= Tsu + Tco,max + Tcq to satisfy hold conditions, Th > Tcq + Tco,min
Jan 12, 2006 #3 E eeeraghu Full Member level 4 Joined Jun 3, 2005 Messages 221 Helped 26 Reputation 50 Reaction score 9 Trophy points 1,298 Activity points 3,384 tco tpd th and from the above equation fmax = 1/Tclk(time period of a clk)