You can have negative setup and hold time requirements for a device.
For example, if you have a negative setup time requirement, the data may arrive at the pins of the device after the relevant clock edge arrives at the pins and the data will still be sampled correctly. This means that internal to the device, the clock experiences a larger delay relative to the data, so that when they both arrive at the internal circuitry that samples the data, the data arrives before the clock signal does.
A similar situation holds true for negative hold time, except that the data is delayed more than the clock.
r.b.