Jun 19, 2007 #1 E EDA_hg81 Advanced Member level 2 Joined Nov 25, 2005 Messages 507 Helped 2 Reputation 4 Reaction score 2 Trophy points 1,298 Activity points 4,808 I am using Xilinx ISE 9.1 to program Spartan3. I got the following message : the following signal(s) form a combinatorial loop: POL_TEMP. What this means? Thanks
I am using Xilinx ISE 9.1 to program Spartan3. I got the following message : the following signal(s) form a combinatorial loop: POL_TEMP. What this means? Thanks
Jun 20, 2007 #2 E echo47 Advanced Member level 6 Joined Apr 7, 2002 Messages 3,933 Helped 638 Reputation 1,274 Reaction score 90 Trophy points 1,328 Location USA Activity points 33,176 the following signal(s) form a combinatorial loop That warning message means your design has combinatorial logic with an output feeding back to the input, forming a loop. The result is usually a latch or oscillator. Most FPGA designers want to avoid such things, so the synthesis tool warns you.
the following signal(s) form a combinatorial loop That warning message means your design has combinatorial logic with an output feeding back to the input, forming a loop. The result is usually a latch or oscillator. Most FPGA designers want to avoid such things, so the synthesis tool warns you.