What are the ways to infer whether a path is multicycle or not after synthesis is don

[sun_ray]

What are the ways to infer whether a path is multicycle or not after synthesis is done.

 

[rca]

Re: multi cycle detection after synthesis

what is your issue?
if your design does not met the timing, you could analyze if some path need multicycle constraint

 

[ads-ee]

Re: multi cycle detection after synthesis

You shouldn't have to infer if it's multicycle. Synthesis tools won't change multicycle or non-multicycle behavior of a circuit. So if the original RTL had multicycle paths then the resulting netlist will also be multicycle for those paths.

 

[sun_ray]

Re: multi cycle detection after synthesis

You shouldn't have to infer if it's multicycle. Synthesis tools won't change multicycle or non-multicycle behavior of a circuit. So if the original RTL had multicycle paths then the resulting netlist will also be multicycle for those paths.

But I need to infer. So I started the thread to know how I can infer or detect a multicycle path after synthesis is complete. How can it be done?

Regards

 

[rca]

Re: multi cycle detection after synthesis

You want to avoid to redo the synthesis?
So you could add the constraint in the PnR tool.

 

[sun_ray]

Re: multi cycle detection after synthesis

It is not that we want to avoid to redo the synthesis. Please understand the question in post no. 1.
Regards

 

[rca]

Re: multi cycle detection after synthesis

Synthesis will never indicate if a apth is multicycle or need a false path constraints.

Only the RTL designers could indicate which path could be relax with a multi cycle path constraints.

The synthesis engineer could report the worst path with the current constraint set, and review them with the design engineer to confirm the current worst paths are real or not. If the worst paths are real and the timing is not met, you could relax only with multicycle path if the design allows that, or the design engineer must change the RTL.