What are the specifications for developing a CMOS PLL?

[arbalez]

cmos pll

i would like to develop a cmos pll for my final year project. what are the specifications that i need to follow?

 

[IanP]

Re: cmos pll

Your question is a little bit to general as the specifications will differ depending on applications (frequency range, .. etc).
Below you can find a link to CMOS PLL, the 74VHC4046.
https://www.fairchildsemi.com/ds/74/74VHC4046.pdf
It contains specifications and internal block diagram.
Maybe fro there you will find a good point to start with ..

 

[arbalez]

Re: cmos pll

thanks for the link, IanP.
actually i want to know the general specification that an cmos ic designer should set before designing cmos pll.
another thing, which one is better? analog only or mixed-signal cmos pll?

 

[bg21359]

Re: cmos pll

most of cmos PLL looks like mixed-signal, PFD, divider are digital; vco, cp are analog

 

[khouly]

Re: cmos pll

u must know the system that the pll will be used for
to know the specs required
like phase noise , lock time , frequency step

there r many systems with different requirements

thanks

 

[arbalez]

Re: cmos pll

i want to design a cmos pll for frequency synthesizer. it can locks at around 900MHz.

 

[paladinzlp]

cmos pll

what is your lock time SPEC and phise noise?

 

[arbil]

Re: cmos pll

what are the PLL's specifications if i attempt to design a a cmos pll for frequency synthesizer using in wireless communications based on WCDMA or CDMA2000?
I want to have a try on it for my last year project, but i am a learner, i also want to know how difficulty and how long it will be.
My tutor may have a chance to tape out of .35 process. Is it possible to do the work?