[SOLVED] WARNING:Xst:2170 - Unit the following signal(s) form a combinatorial loop:

hi
plz help

when i synthesis vhdl
the following warnings occurs

WARNING:Xst:2170 - Unit rc5round : the following signal(s) form a combinatorial loop: rc5round_ao<8>_cyo, ao<17>, c1/N27, m2<17>, rc5round_ao<5>_cyo, rc5round_ao<12>_cyo, rc5round_ao<1>_cyo, rc5round_ao<4>_cyo, m3<0>, rc5round_ao<3>_cyo, d1/r<0>, rc5round_ao<9>_cyo, rc5round_ao<11>_cyo, rc5round_ao<10>_cyo, c1/N19, rc5round_ao<0>_cyo, rc5round_ao<13>_cyo, rc5round_ao<6>_cyo, rc5round_ao<14>_cyo, c1/N31, rc5round_ao<2>_cyo, c1/do<0>_map1720, c1/N1, m4<0>, cs<0>, rc5round_ao<16>_cyo, rc5round_ao<7>_cyo, rc5round_ao<15>_cyo.
WARNING:Xst:2170 - Unit rc5round : the following signal(s) form a combinatorial loop: m4<1>, c1/N22, cs<17>, c1/N227, cs<1>, c1/do<2>_map1696, rc5round_ao<17>_cyo, cs<2>, ao<18>, ao<2>, m2<18>, m3<2>, c1/N152, m2<2>, m3<17>, c1/N88, c1/N219, c1/do<17>_map1468, c1/N215, ao<19>, c1/N225, m2<19>, c1/N91, c1/N86, c1/N231, c1/N83, c1/N184, rc5round_ao<18>_cyo, N5, c1/do<1>_map1708, d1/r<1>.
WARNING:Xst:2170 - Unit rc5round : the following signal(s) form a combinatorial loop: c1/N159, ao<21>, c1/N229, m2<21>, m3<19>, c1/do<3>_map1672, c1/N69, c1/N71, c1/N133, d1/r<3>, c1/do<19>_map1408, rc5round_ao<19>_cyo, c1/do<4>_map1648, m4<3>, cs<19>, cs<3>, c1/N158, c1/N73, c1/N239, c1/N156, c1/N136, cs<4>, ao<20>, ao<4>, c1/N235, m2<20>, m2<4>, c1/N30, rc5round_ao<20>_cyo, m3<4>, N7.
WARNING:Xst:2170 - Unit rc5round : the following signal(s) form a combinatorial loop: m4<5>, cs<21>, cs<5>, c1/N243, c1/do<6>_map1600, d1/r<5>, c1/N150, c1/N29, c1/N182, N9, c1/N137, c1/do<5>_map1624, cs<6>, ao<22>, c1/N247, ao<6>, m2<22>, c1/N26, m2<6>, c1/do<21>_map1516, rc5round_ao<22>_cyo, ao<23>, m2<23>, c1/N151, c1/N237, m3<6>, c1/N148, m3<21>, c1/N197, c1/N199, rc5round_ao<21>_cyo.
WARNING:Xst:2170 - Unit rc5round : the following signal(s) form a combinatorial loop: ao<25>, c1/N192, c1/N55, m2<25>, c1/N135, N11, c1/N85, c1/N194, rc5round_ao<23>_cyo, d1/r<7>, c1/N212, c1/N245, c1/N28, m4<7>, cs<23>, cs<7>, c1/N254, rc5round_ao<24>_cyo, m3<8>, c1/N251, c1/do<7>_map1576, c1/N207, cs<8>, ao<24>, c1/do<8>_map1552, ao<8>, m2<24>, m2<8>, c1/do<23>_map1564, m3<23>, c1/N87.
WARNING:Xst:2170 - Unit rc5round : the following signal(s) form a combinatorial loop: c1/N74, c1/N62, cs<25>, cs<9>, c1/N255, c1/N60, c1/N70, d1/r<9>, c1/do<9>_map1528, cs<10>, c1/N21, ao<26>, ao<10>, m2<26>, m2<10>, rc5round_ao<25>_cyo, c1/do<10>_map1504, c1/N84, ao<27>, c1/N90, m2<27>, c1/N76, c1/N94, c1/do<25>_map1432, m3<10>, c1/N18, m3<25>, rc5round_ao<26>_cyo, N13, c1/N25, m4<9>.
WARNING:Xst:2170 - Unit rc5round : the following signal(s) form a combinatorial loop: c1/N160, ao<29>, m2<29>, c1/N24, d1/r<11>, c1/do<12>_map1360, N15, c1/N157, c1/N118, c1/N51, c1/N153, rc5round_ao<27>_cyo, c1/N96, c1/N145, m4<11>, rc5round_ao<28>_cyo, cs<27>, cs<11>, c1/do<11>_map1480, c1/N116, m3<27>, c1/N143, cs<12>, c1/N114, m3<12>, ao<28>, ao<12>, m2<28>, m2<12>, c1/N149, c1/do<27>_map1456.
WARNING:Xst:2170 - Unit rc5round : the following signal(s) form a combinatorial loop: cs<29>, rc5round_ao<29>_cyo, cs<13>, c1/N189, c1/N175, m3<29>, c1/do<29>_map1660, c1/do<14>_map1588, c1/N162, c1/N198, c1/N23, c1/do<13>_map1372, c1/N172, c1/N75, cs<14>, ao<30>, ao<14>, m2<30>, m2<14>, c1/N48, c1/N50, ao<31>, c1/N20, m2<31>, c1/N193, c1/N187, rc5round_ao<30>_cyo, m3<14>, N17, d1/r<13>, m4<13>.
WARNING:Xst:2170 - Unit rc5round : the following signal(s) form a combinatorial loop: c1/N203, c1/N210, c1/N138, m3<16>, N19, c1/do<15>_map1384, c1/N213, c1/N102, c1/N105, d1/r<15>, m4<15>, cs<15>, c1/N140, c1/N200, cs<16>, c1/do<16>_map1402, ao<16>, m2<16>.

what is meaning of the following signal(s) form a combinatorial loop:
how to rectify this error

It's a matter of coding style. Combinatorial loops are the way how latches are implemented in most FPGAs. In an overall synchronous design, only registers and no latches would be used as storage elements. Without knowing your design, we can't determine, if the latches are created on purpose or erroneously.

The apparently large number of latches suggests however a basic design concept problem.