W/L determination for MOSFET operation

[deepsetan]

Hi guys,

In CMOS Circuit Design, Layout and Simulation by R.Jacob Baker page 300, Table 9.2 shows the parameters for short channel MOSFET. These are the parameters given:

Id = 10uA
Vgs = 0.350V
Vth = 0.280V
Cox = 25f F/um^2
W = 2.5um
L = 100nm

I'm trying to calculate back using Id equation and the parameters given to get the value W/L.

Id = 1/2 UnCoxW/L(Vgs-Vth)^2

W = 2*(10u)*(100n)/(25f)(0.350-0.280)^2 L=100nm
W = 2e-12 /1.225e-16
W = 16325

Why my W that I obtained was different from the book (W should be 2.5um) . I knew that my calculation could be error but can you show me what is the mistakes? I really need your help. Thank you.

 

[Dominik Przyborowski]

Calculating drain current from this parameters You should take into account factors related to carrier velocity saturation (1), mobility degradation caused by vertical field (2), "a true" transfer characteristic (3). From my hand calculation I get 13.3 µA of drain current for this device only including mentioned above three factors:

\[(1,2)~~ K_{eff}=\frac{\mu_0 C_{ox}}{\sqrt{1+(\frac{V_{dssat}}{E_c L})^2} (1+\theta ~V_{od})}\]
where E_c = 0.8MV/m is a critical field, \theta is a semi-empirical parameter for vertical field degradation equal around 10^-7/tox

Based on ACM model the drain current normalized to "specific" current is given by Lambert W function and for given overdrive voltage is equal to around 5.
Specific current for ACM model is given as:
\[I_{spec}=0.5 n K V_t^2 W/L\],
where V_t is a thermal voltage and n is slope factor (equal to 1.05 to 1.7 depending to process, I assumed 1.25).


Of course it doesn't includes DIBL, CML and some other effects

 

[deepsetan]

"where E_c = 0.8MV/m is a critical field, \theta is a semi-empirical parameter for vertical field degradation equal around 10^-7/tox"

Thank Dominik!, now I'm more understand. Does this mean that the E_c and theta are always the same for all calculation or depends on the technology?

 

[Dominik Przyborowski]

Critical field value is the same for the same carriers: 0.8 MV/m for electrons and 1.95 MV/m for holes, but the formula for carrier velocity saturation is slightly differ. For holes is simply 1+Vds/(Ec L). Theta is process dependent but for first approximation the value above is good for hand calculations.

 

[deepsetan]

Thanks Dominik!, if you don't mind, can I see your calculation for Keff and Ispec as you calculated above? Currently I'm using 0.13um technology and I want to determine W/L for my transistor. I'm using Id saturation equation but the value of W that I obtained is really big maybe due to some of errors during my calculation.

 

[Dominik Przyborowski]

From classic square law and mentioned parameters You should gave W/L=1.21, so for 100nm your W should be 121nm.
Probably You are fault in prefixes product


///edit:
My calculation for current gain factor:
\[K = \frac{\mu_n C_{ox}}{\sqrt{1+\frac{Vdssat}{E_c L}} \theta ~V_{od}} = \frac{0.135 m^2/Vs 25 fF/\mu ~m^2}{\sqrt{1+(70m/0.1\mu ~m 0.8~MV/m)^2} (1 + 70 V^{-1}70 mV)} = \frac{3375 \mu ~A/V^2}{6.52} = 517.6 \mu ~A/V^2\]
Specific current:
\[I_{spec}=0.5 1.25 0.67m~V^2 517.6 \mu ~A/V^2 25 = 5.42 \mu ~A\]
And now I see that I'm badly read IC for 70mV of overdrive voltage (it could be around 3 not 5)
\[I_D = IC I_{spec} \approx 15 \mu ~A\]

Of course I didn't include more effects (somewhere I have whole machine to analytical calculates of mosfet OP and its parameters based on physics based model but I haven't to looking for it)

 

[deepsetan]

In real design world, how can we determine the value of W/L for each stage? My question is if there are lot of transistors and stage in our design, how can we actually determine the value of W/L for each transistor? Does we really need depends only with this Id equation or there are faster way to do that?