Vote of 8 x16 (statical mode)VHDL

[jmoore180]

Hi.
I am trying to design a “vote of eight” which is proving to be changing and wanted to know if any one may have some out their may have some insight on how bet to do this.

I have eight sets of 16 lines which i need to find which 16 bit values occurs most often in the eight sets of lines. A guy I work with called this the statical mode operation.
So far the algorithm I have is :
step 1:
XOR each bit of a 16 bit word with the corresponding bit from the 16 bit words.
step 2:
or the results so that we have a zero if two words are the same 1 if they differ
step 3:
count the number of zeros produced for each and or compare them to
the others in a chain fashion (see picture below for better explanation) if
the next one has fewer zeros use current command decoders output if not
move to next command decoder and repeat.

comparison chain for ored xor output:
format: 16 bit word #- comp with 16bit word #
level of chain
1 2 3 4 5 6 7
1-2 2-3 3-4 4-5 5-6 6-7 7-8
1-3 2-4 3-5 4-6 5-7 6-8
1-4 2-5 3-6 4-7 5-8
1-5 2-6 3-7 4-8
1-6 2-7 3-8
1-7 2-8
1-8

To day I realized in testing it is not sufficient to just compare level 1 and 2 in the above table to determine if 1 has the most same results but you must compare 1 with 2 3 4 5 6 7 and then if one has more 0's than 2 then you must compare it 3 and so forth. If one does not have more 0's than 2 then you must repeat testing 2 against 3 4 5 6 7 etc.

Another complicating factor is i am trying to do this asynchronously because this vote of 8 is part of a redundancy system/address decoder.

Any ideas? been done before?
Thanks in advance Jason

 

[TA37]

Wow, that is not a clear explanation. What is a "line"? Do you mean you have 16 16-bit inputs? a 16x16 ram? A 16-bit single input with data on 16 subsequent clock cycles?

Also, what is the significance of the number of "sets" in this problem if each set is being processed by itself independent from other sets? I.e. if the problem is to find the mode of 16 samples, then you can generate as many mode-of-16-inputs blocks as needed.

Also, how many clock cycles do you have to solve this problem? Does it have to be same-cycle? Can you iterate? Does it have to be pipelined?

 

[jmoore180]

Sorry for the confusion and vague ness.
What I have is eight command decoders which watch eight data steams and if a command decoder detects data for it the data is latched to a 16 byte register. Each command decoder operates asynchronous with respect to the others. Because each command decoder is connected to a different receiver which has it's own clock recovery unit and transmiton paths to each receiver can very.

What we are trying to do is determine what the most common 16 bit value among all eight of the command decoder outputs. This is to serve as a redundancy of eight in case of errors and or one or more of the receivers die. I want to do the comparison based on all 16 bits together not just bit wise in case of weird errors.

Example of operation:
channel 1, 3, 4,5,7,8 have the same 16 bit value and (1≠2≠6) so use the value on channel 1

channel 3, 4, 5 have the same 16 bit value and all the others are different from each other ( 1 ≠2 ≠5 ≠6 ≠7≠8 i.e. channel 1,2,6,7,8 ether died or have errors) so use the value on channel 3.

I would like to do this comparison asynchronous with a resettable one shot (triggers by the Commander decoders data ready output) to latch the final result in. This is because in our application memory elements are to be avoided when ever possible. The reason for the resettable one shot is so the final value will not be latched in or acted upon, what ever the case may be, until most or all of the command decoders revive the command word (another design problem all together...) .

I think I have come up with a solution which simulates functional fine but it is a horrific monstrosity of a piece of VHDL code which I had to generate in c...
If their are any Ideas of elegant/gate saving solutions out their it would be appreciated.

Lastly the final target is an ASIC but i posted here because the question seems more VHDL related an this is where I see most of that discussion. I am new and not very BBS savvy so flame me if I am out of place.

Thanks Jason

---------- Post added at 05:20 ---------- Previous post was at 05:10 ----------

Sorry for the confusion and vague ness.
What I have is eight command decoders which watch eight data steams and if a command decoder detects data for it the data is latched to a 16 byte register. Each command decoder operates asynchronous with respect to the others. Because each command decoder is connected to a different receiver which has it's own clock recovery unit and transmiton paths to each receiver can very.

What we are trying to do is determine what the most common 16 bit value among all eight of the command decoder outputs. This is to serve as a redundancy of eight in case of errors and or one or more of the receivers die. I want to do the comparison based on all 16 bits together not just bit wise in case of weird errors.

Example of operation:
channel 1, 3, 4,5,7,8 have the same 16 bit value and (1≠2≠6) so use the value on channel 1

channel 3, 4, 5 have the same 16 bit value and all the others are different from each other ( 1 ≠2 ≠5 ≠6 ≠7≠8 i.e. channel 1,2,6,7,8 ether died or have errors) so use the value on channel 3.

I would like to do this comparison asynchronous with a resettable one shot (triggers by the Commander decoders data ready output) to latch the final result in. This is because in our application memory elements are to be avoided when ever possible. The reason for the resettable one shot is so the final value will not be latched in or acted upon, what ever the case may be, until most or all of the command decoders revive the command word (another design problem all together...) .

I think I have come up with a solution which simulates functional fine but it is a horrific monstrosity of a piece of VHDL code which I had to generate in c...
If their are any Ideas of elegant/gate saving solutions out their it would be appreciated.

Lastly the final target is an ASIC but i posted here because the question seems more VHDL related an this is where I see most of that discussion. I am new and not very BBS savvy so flame me if I am out of place.

Thanks Jason