ngmedaboard
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??? I said: "you can omit C5 and D5 in the first circuit"I'm confused you mentioned C5 and D5 can be eliminated in the second circuit.
Also, even as a trippler, that still wouldn't get our 5V near 500V?
The output voltage of a flyback circuit is limited only by the non-ideal device parameters, particularly transistor and diode
switching losses, also transformer leak inductance.
checkmate said:For VM A: 3-stage Cockroft-Walton (CW) multiplier providing 3x gain on the secondary side. What's the 10M for? It seems to be only increasing the output impedance of the CW multiplier stage. And contrary to what FvM has mentioned, omitting C5 and D5 would result in 0.5x less gain.
For VM B: Just a Dickson Pump doubler on the secondary side, providing 1.5x gain.
The FET, Transformer, D2 and C4 forms a standard flyback cell.
C5, D3 and D4 forms a one-stage dickson pump.
C6 is the output cap.
So assuming
1. Transformer secondary voltage pulse are the same, ie equal input voltage, equal duty cycle and equal Ton
2. Ignoring stray capacitances which reduces the effectiveness of the VMs,
VM A should provide twice the output voltage compared to VM B.
No. You don't consider the extreme unsymmetric voltage relation of flyback versus forward voltage. "Gains" of 0.5 areomitting C5 and D5 would result in 0.5x less gain.
We want supplies to have a low output impedance not because of voltage drops, but for it to be responsive to changes in loading conditions.ngmedaboard said:10M voltage drop shouldn't be that great as we are only pulling a few uA through it.
From the pin numbering, I expected that 2 and 4 are same polarity, e.g. "low side". Otherwise, the output voltage
would be very low. An unequivocal polarity sign should be better shown in the circuit symbol.
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