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Voltage level conditioning

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martin_t

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Hello all.
I have a question that someone might be able to help me with.
I'm designing a device whose input will be 36-0 Vdc (on and off).
That will go into a NAND gate (4093).
The thing is that the gate accepts 15 Vdc tops at its input.
Besides a simple voltage divider, can anyone think of another alternative. I thought of using an optocoupler (I know they share the same ground and that they are at same potential), but besides this, can anyone think of a more "elegant" solution?
Thanks very much in advance.

Martín
 

The most elegant solution is the resistive potential divider, costs are in pence. Remember to limit the high voltage to Vcc. If you are after high speed you could compensate it.
Frank

Thanks for your reply Frank.
So basically a voltage divider will do?
Maybe followed by a zener or a TVS diode?
I'm concerned since 36 Vdc will be going into this cmos gate and I was thinking of some sort of protection.

Martín
 

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