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Virtex-5 FPGA architecture and reconfiguration data

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lahrach

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Hi friends,

I need some one to correct me if my knowledge are incorrect: The implimentation of a design in Virtex-5 is down through downloading the Bitstream to Configuration frames and each frames is a set of 14 words and each word is composed from 32 bits.

The internal primitive ICAP can make eccess to these frames to allow Read/Write operations from it.

Are these infos correct?

FL
 

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