Via defining in ADS: cond1 and cond2 issue

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ommumm

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Via in @ds

In @ds there are three layers to define a via that are,hole,cond1 & cond2
cond1 is upper tranaitional metal Layer and cond2 is bottom transitional metal layer
I have defined cond1 as cond, but what should I define cond2
 

Via in @ds

Hi all,

About the via in ADS, I also have a problem:

when I use the VIA2(Cylindrical via hole in microstrip) in ADS, there is a range of usage: 100um<H<635um, if I want to set PCBoard height as 1.6mm. How to ensure the model's accuracy?or is there another method for substitute? Thanks!
 

Re: Via in @ds

ommumm said:
In @ds there are three layers to define a via that are,hole,cond1 & cond2
cond1 is upper tranaitional metal Layer and cond2 is bottom transitional metal layer
I have defined cond1 as cond, but what should I define cond2
Click to expand...

In my design I have selected cond2 as cond.

/K
 

Re: Via in @ds

Since the Via goes to your ground in microstip cond2 layer is just cond, same as cond1, cond1 and cond2 have an affect if u using multilayer or overlapping layers.
 

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