Im trying to make a 32x8 memory, but can only write, cannot read. I need the data bus to be bidirectional as well..
architecture memories of memories is
type Memory_Image is array (natural range <>) of std_logic_vector(7 downto 0);
signal Addr : Memory_Image(0 to 31);
begin
process (read, write)
begin
if (read = '1') then
data <= Addr(to_integer(unsigned(address)));
end if;
if (write = '1') then
Addr(to_integer(unsigned(address))) <= data;
end if;
end process;
end memories;