VHDL to schematic conversion

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TekUT

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Dear all,
I know that usually is made the schematic to VHDL translation but I'm starting in learning this language and I like to know if using Modelsim or other software there is a way to show in a schematic like way the equivalent of a previously written VHDL code.

Thanks in advance

Powermos
 

Hi

You can observe how code implemented after Synthesys (RTL) and Place`n`Route (Post-Fit). See CPLD/FPGA vendors soft.
 

Active HDL from Aldec can do this.
 


If VHDL to Schematic only, XILINX can handle it by View RTL Schematic option. If you want to get a VHDL netlist(gate-level) design, use Design Compiler...
 

hi , you can use altium designer , i learned recently that it can do this kinds of conversions
 

Try Visual IP designer .
 

Qu(ar)tusII can do that too.
 

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