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VHDL synthesis Doubt

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sumod

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i tried to multiply two numbers in xilinx using VHDL. The program has no errors but when it comes to viewing the results, when the MSB of one or both the numbers is '1', then the data is not getting read (it is showing undefined symbol). But when the MSB of both the numbers is '0', then both the data can be read and it is giving appropriate result too. why so?
 

TrickyDicky

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My mind reading powers suggest you wrote something wrong in the code.
Why not post the code to see what you did wrong (or why not debug it yourself in the testbench that you wrote before programming the chip?)
 

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