I was talking from a compiler POV, not a language point of view. The question was why Quartus allowed a component with an unsigned type port to map to the entity that was declared with a std_logic_vector, without any conversion done anywhere. Hence my reference to Quartus treating everything like a std_logic_vector during mappings (probably because of the cross language support required).
What code are you talking about and what version of Quartus are you using?
Quartus does not allow an entity with an unsigned type to map to a std_logic_vector signal. The code posted below, compiled with Quartus 10.0 SP1 produces the following errors (as it should). If you move the comments on the posted code to use the port maps that have the conversion functions, it will compile just fine (again, as it should).
Code:
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity widget is port(
inp_unsigned: in unsigned(15 downto 0);
out_unsigned: out unsigned(15 downto 0));
end widget;
architecture rtl of widget is
begin
out_unsigned <= inp_unsigned;
end rtl;
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity top is port(
inp_slv: in std_logic_vector(15 downto 0);
out_slv: out std_logic_vector(15 downto 0));
end top;
architecture rtl of top is
begin
dut : entity work.widget port map(
inp_unsigned => inp_slv,
-- inp_unsigned => unsigned(inp_slv),
out_unsigned => out_slv);
-- std_logic_vector(out_unsigned) => out_slv);
end rtl;
Error (10476): VHDL error at Junk.vhd(11659): type of identifier "inp_slv" does not agree with its usage as "UNSIGNED" type
Error (10476): VHDL error at Junk.vhd(11661): type of identifier "out_slv" does not agree with its usage as "UNSIGNED" type
Error (10558): VHDL error at Junk.vhd(11661): cannot associate formal port "out_unsigned" of mode "out" with an expression
Error: Quartus II Analysis & Synthesis was unsuccessful. 3 errors, 0 warnings
Error: Peak virtual memory: 229 megabytes
Error: Processing ended: Thu Jan 26 08:07:55 2012
Error: Elapsed time: 00:00:03
Error: Total CPU time (on all processors): 00:00:02
Error: Quartus II Full Compilation was unsuccessful. 5 errors, 0 warnings
Kevin Jennings