VHDL ROM for generic modulo adder

[energy_baz]

hii everyone,

I'm new in VHDL and I'm trying to design a modulo generic adder by using ROM. The output for the adder should be (x + y)mod m. I have no idea on how to create it.

 

[permute]

basically, you must do the following:
1.) declare a type for the ROM, eg: type madder_type is array(natural range <>) of std_logic_vector(??? downto 0);
2.) write an init function for the ROM, eg: function init_madder() return madder_type is ...
3.) use both to generate a "signal", eg: signal madder : madder_type := init_madder();
4.) index the ROM to perform the op, eg: result <= madder(to_integer(unsigned(x&y));

 

[energy_baz]

thanks but I didn't get it. I'm looking for the full code for the ROM design. These is the basic code for ROM but I don't know how to use it for my problem. Really need someone to help me.

regards..


library ieee;
use ieee.std_logic_1164.all;

entity ROM is
port ( address : in std_logic_vector(3 downto 0);
data : out std_logic_vector(7 downto 0) );
end entity ROM;

architecture behavioral of ROM is
type mem is array ( 0 to 2**4 - 1) of std_logic_vector(7 downto 0);
constant my_Rom : mem := (
0 => "00000000",
1 => "00000001",
2 => "00000010",
3 => "00000011",
4 => "00000100",
5 => "11110000",
6 => "11110000",
7 => "11110000",
8 => "11110000",
9 => "11110000",
10 => "11110000",
11 => "11110000",
12 => "11110000",
13 => "11110000",
14 => "11110000",
15 => "11110000");
begin
process (address)
begin
case address is
when "0000" => data <= my_rom(0);
when "0001" => data <= my_rom(1);
when "0010" => data <= my_rom(2);
when "0011" => data <= my_rom(3);
when "0100" => data <= my_rom(4);
when "0101" => data <= my_rom(5);
when "0110" => data <= my_rom(6);
when "0111" => data <= my_rom(7);
when "1000" => data <= my_rom(8);
when "1001" => data <= my_rom(9);
when "1010" => data <= my_rom(10);
when "1011" => data <= my_rom(11);
when "1100" => data <= my_rom(12);
when "1101" => data <= my_rom(13);
when "1110" => data <= my_rom(14);
when "1111" => data <= my_rom(15);
when others => data <= "00000000";
end case;
end process;
end architecture behavioral;

 

[TrickyDicky]

that is very basic code for an asynchronous ROM. There are many ways to tidy it up.
You might want to look through the altera or xilinx books, they provide recommended coding styles for synchronous roms.