signal a : std_logic_vector(0 to 3);
signal b : std_logic_vector(1 to 4);
signal c : std_logic_vector(3 downto 0);
signal d : std_logic_vector(7 downto 4);
a <= "X10Z"; -- a(0) = 'X', a(1) = '1'; a(2) = '0', a(3) = 'Z'; -- a(3) is the leftmost bit
b <= a; -- b(0) is an error. b(1) = 'X', b(2) = '1', b(3) = '0', b(4) = 'Z';
c <= a; -- c(0) = 'Z', c(1) = '0', c(2) = '1', c(3) = 'X'; -- c(0) is the leftmost bit
d <= a; -- d(0), d(1), d(2), d(3) are not valid. d(4) = 'Z', d(5) = '0', d(6) = '1', d(7) = 'X'