vhdl: records for a bus of digital signals

[xlynx3]

vhdl: records for a bus

i'm trying to use records. But i need a bus of DIGITAL type where all bits of the bus should have the properties of DIGITAL type. How can I write it?

Thanks in advance..

type DIGITAL  is
record

            LEVEL      : REAL range -0.6 to 1.8;
            LOGIC     : STD_ULOGIC;
            STATUS   : MYSTATUS;
	      
end record;

 

[FvM]

vhdl: records for a bus

Real isn't a synthesizable data type, only provided for simulation testbench and compile time calculations. I don't see, what you try to achieve. If level represents a quantized analog signal, you have to define a suitable data format first. MYSTATUS would need to be typed defined before.

 

[xlynx3]

Re: vhdl: records for a bus

I'm writing this code for verfication purposes. I'm trying to standartize the errors messages etc. My aim is to writing the code with real values to represent analog blocks in digital simulations.