vhdl: need help with PSW

Thread starter Chi Pheo
Start date May 13, 2006

Status: Not open for further replies.

May 13, 2006

Chi Pheo

Newbie level 1

Hello,

I am designing a General-Purpose Computer using vhdl. It contains Ram, MAR, MBR,...Register A with PSW, RegisterB with PSW...

Right now, I am stuck at the Architecture entity, expecially declare the PSW bits of RegA and RegB in the architecture entity. The PSW involves Parity, Zero, Sign bits.

So if anyone here, know how to do it or have any references as well as links. Please help me!

Thank you very much!
CP=)

Status: Not open for further replies.

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vhdl: need help with PSW

Chi Pheo

Newbie level 1

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