Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

vhdl: need help with PSW

Status
Not open for further replies.
C

Chi Pheo

Newbie level 1
Joined
May 13, 2006
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,287
Hello,

I am designing a General-Purpose Computer using vhdl. It contains Ram, MAR, MBR,...Register A with PSW, RegisterB with PSW...

Right now, I am stuck at the Architecture entity, expecially declare the PSW bits of RegA and RegB in the architecture entity. The PSW involves Parity, Zero, Sign bits.

So if anyone here, know how to do it or have any references as well as links. Please help me!

Thank you very much!
CP=)
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top