VHDL memory design using registers for spartan 3

[ambar686]

I want to design a simple memory in vhdl language using registers. I am using Xilinx kit Spartan 3 chip

 

[soloktanjung]

Hi,

From google: http://quartushelp.altera.com/12.1/mergedProjects/hdl/vhdl/vhdl_pro_registers.htm