OvErFlO
Full Member level 3
hd44780 vhdl
What's the best method in VHDL to create a inizialization sequence ?
I have to create this sequence :
can anybody help me ?
Can I use a FSM or I can write in another way ?
thanks
What's the best method in VHDL to create a inizialization sequence ?
I have to create this sequence :
Code:
reset button
15 msec wait
5 msec create a trigger _--_ to sample init data
5 msec create a trigger _--_ to sample init data
120 usec create a trigger _--_ to sample init data
Loop
wait until event occurent
120 usec create a trigger _--_ to acquire data
end Loop
can anybody help me ?
Can I use a FSM or I can write in another way ?
thanks