yes, not quite clear what all the types are, but makes sense.
Usually, it's just easier to name the functions the functions like this (as I have seen in many places):
function to_record( s : std_logic_vector ) return my_record_t;
function to_slv( r : my_record_t ) return std_logic_vector;
Its clearer to the user whats going on and not have to dig through your package to find the correct name. Luckily, because VHDL allows function overloading by parameter types, you can have a pair of these for each of your record types, and compiler will just pick the correct one.