VHDL code error: signal of type real is not supported

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chitra ranganath

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hi
in my vhdl code i`m getting an error saying

Xst:1547 - "F:/Xilinx/img_wr1/img_wr.vhd" line 75: Signal <comp_cnt> of type real is not supported.
pls help me to overcome this error as early as possible
 

Re: signal of type real.

You should read your errors.

Real type is not supported in synthesis. if you want to do floating point, you need to use the floating point IP cores, which will use std_logic_vectors.
 
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