Entity <fir_4tap> compiled.
ERROR:HDLParsers:800 - "I:/Shivam/cla/cla/FIR/FIR.vhd" Line 109. Type of H0 is incompatible with type of 00000010.
ERROR:HDLParsers:800 - "I:/Shivam/cla/cla/FIR/FIR.vhd" Line 110. Type of H1 is incompatible with type of 00000001.
ERROR:HDLParsers:800 - "I:/Shivam/cla/cla/FIR/FIR.vhd" Line 111. Type of H2 is incompatible with type of 00000011.
ERROR:HDLParsers:800 - "I:/Shivam/cla/cla/FIR/FIR.vhd" Line 112. Type of H3 is incompatible with type of 00000100.
You cannot assign array like that. it will show an syntax error
For declaring an array of 15rows and 15 coloumns :
Code:
type sample is array (15 downto 0) of std_logic_vector(15 downto 0);
signal sample_1 : sample;
if clk = '1' and clk'event then
i <= i + 1;
sample(i) <= data_in;
end if;
i think if you are using 'i' as std_logic_vector you need to convert 'i' into an integer as follows.
I dont quite know what you are trying to acheive? your code assigns a single value in the array on each clock cycle, is this what you intended? This example isnt very good as it doesnt make clear whether you're trying to create a ram or just and array. And I dont understand why you give an example using data_in to assign the i signal?
It also uses the non-standard conv_integer function.