VHDL bit assignments

[shaiko]

signal x : ( A downto B ) ; -- A and B are entity generics

suppose we want to assign location 'B' with '1' and all the other bits with '0'.
If A is 7 and B is 0 then signal x becomes ( 7 downto 0 ) and we can write:

x <= ( 7 downto 1 => '0' , 0 => '1' );

But if we keep it generic and write

x <= ( x ' high downto x ' low + 1 => '0' , x ' low => '1' ) ;

it fails in compilation with the following message:

Non-locally static choice (association #1, choice #1) is allowed only if it is the only choice of the only association.

Please advice.

 

[TrickyDicky]

Like it says, the values are not static. Therefore, you cannot assign the values like that.
Therefore, why not just try (I cant remember if generics are counted as locally static):

x <= (A downto B+1 => '0', B => '1');

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or even tidier:
x <= (B => '1', others => '0');