VGA problem, need your help!

[bigworm]

my VGA uses the following structure:

_____R2____
| ______ |
-----R1------| opa |------
|_____|

R2 is the feedback resistor, and the Gain is -R2/R1.
the spec for this VGA is -3 to -33dB gain
now I met with a problem.
when the gain is between -3 and -21dB (3dB step)
the operation points(OP.) of OPA is all right and it works well.
but when I switched the gain to -24dB( and lower) , where R1 will be much larger than R2, the OP. of OPA turns to be completely wrong. the input common mode voltage is divided by R1 and R2, so that the input MOS of OPA won't work under such a low common mode voltage.
how did this happen? somebody says it may be caused by the settling time of the input MOS. when R1 is much larger, the voltage of the node of the OPA input needs longer time to settle, while it may take shorter time to settle if the node voltage is set by the division of R1 and R2.
is it right?
and how to solve this problem, since R1 must be much larger than R2 if you want to get gain -33dB.
Thank you for your help

 

[bigworm]

oh,my god, the figure is so confusing.

the structure is

R1 is connected serially to the input port of OPA,
and R2 is connected the input and output of OPA,
so, the gain is -R2/R1.
but why does OP. of OPA change when R1>>R2?
help

 

[kwkam]

you can't show your problem clear enough. Usually, -3 to -33 dB attenuation is OK for normal opamp design.