Hi, I would use an INA since they are used for small signal purposes, try INA141, adjusting the gain is simply a means of using a variable resistor.
Perhaps you should review the transistor data of your design kit. You can calculate expectable voltage and current noise for specific transistor size and drain current.No real idea for the moment about the voltage or current noise.
Perhaps you should review the transistor data of your design kit. You can calculate expectable voltage and current noise for specific transistor size and drain current.
which technology are you using ? tsmc , umc ? cmos or bipolar ? 0.18u ? 0.13u ?
I did a simple 2 stage opamp design:
View attachment 132632
View attachment 132633
DC gain: 78dB
UGB :1.8 MHz
PM: 57 deg
Total current : 900 nA
VDD = 1v
it is designed in 180nm you can design in 28nm
You'r right, they are in sat... but you can be both, in sub-th an still be in sat (Vgs < Vth but Vds > Vdsat).
I'm not trusting anymore the cadence Operating mode since it gives me wrong info.
Here is my differential input signal. I dc block and add biasing (Vdd/2).
View attachment 132642
So you think your OpAmp can amplify such a low input differential signal?
what is the frequency of your signal ?
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