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Very accurate cmos bandgap reference circuit

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cinch

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accurate bandgap

i have designed a cmos bandgap circuit with accuracu < 5mv over a temperature sweep of -40° to +120° C. But when i simulate for process corners, accuracy is > 100mv. Any idea how to go abt it ? i have tried various architectures using opamp, current mirror, cascode etc.
 

accurate bandgap references

More variation across corners is due to Vbe variation of BJT across corners. When Vbe changes across corners, then bandgap curve across temperature is not really flat and it skews on either side. The way to handle is to add control bits bits where you can change the KVt contribution in overall voltage.
 

bandgap no trimming

you must have a trimming circuit
 

cmos bandgap reference

sunking said:
you must have a trimming circuit

Hi
what is this trimming circuit?? can u pls upload any material or links on this trimming circuit
 

cmos bandgap circuit

I met the same problem.
Someone told me that I should tune the two resisors (doing the dc sweep analysis on temperature), I have tried ,but not succeed,:-(
 

ramy_maia said:
Chethan said:
what is this trimming circuit??
please can anyone tell ?

I think that trimming Ct means that NMOS transistor with drain is connected to sourceand i/p is connected to them , and o/p is taken from the gate
 

Why people post opinions but not facts only! Wrong answers could gain a few points but confuses the person who is in need a proper answer. So it is not nice to post wrong answers. Writing description and understanding waht it meant is hard enough, pls do not make it harder.

Now trimming circuit: Because there will be variations process to process and also simulation is not %100 fits tp reality there normaly a provision as trimming of resistors so that if a very precise ref voltage is needed these trims are used.

What is trimmed: R value of (Delta Vbe/R) for TC trim and R value of multiplier resistor for ref output voltage value. (Think how one set these R values in simulation). Evaluate delta VT changes and process changes and make provisions to cover all the possible variations. Normaly process variables needed for bandgap design is not characterized well so trimming also conveniently covers the error if design is targeted a bit off.
Since trimming incurs extra test costs and chip area, implementation of it needs an optimization i.e. how many bits of trim is good enough and overal trimming strategy to cover as much trimming range needed with as small area.

Now about first question of variations over the process: Let assume that 0 TC is set at 25C than there will be increasing error away from 25C. This TC error and it can be fixed with second and third order TC fixes implemented in design.
About variation at 25C value over PVT this will be there (not 100 mV). It can be caused offset variations, active device mismatches etc. The better the circuit and component quality the smaller this error.
 

tekno1,

Do you have any idea about how accurate a CMOS bandgap can really achieve?

I have designed tens of Bandgap circuits for different processes. But the testing result is not cheerful. By trimming, I can control the output voltage in ±20mV. It usually met the customer's requirment. But I think it's not accurate enough and want to find a way to improve it.
 

tekno1 said:
Now trimming circuit: Because there will be variations process to process and also simulation is not %100 fits tp reality there normaly a provision as trimming of resistors so that if a very precise ref voltage is needed these trims are used.

Since trimming incurs extra test costs and chip area, implementation of it needs an optimization i.e. how many bits of trim is good enough and overal trimming strategy to cover as much trimming range needed with as small area.

just to insure that i correctly understood you
you mean the trimmer circuit is a combination of resistors that i control them by a certain digital word to give me the required equivalent resistance,which lets the circuit operates after manufacturing nearly as the simulated values
am i right?
 

I have a question about trimming circuit.

Is the trimming circuit a kind of automatic feedback circuit that can sense output error and tune the reference circuit by itself? Or just some bits to control resistance ratio, but you have to switch on/off manully(I mean trimming chip by chip)

Thanks,
 

ramy_maia said:
Chethan said:
what is this trimming circuit??
please can anyone tell ?

Design some switch circuit to change resistance to correct bandgap out voltage.

But it will change circuit's temp. curve.
 

tekno1,

Do you have any idea about how accurate a CMOS bandgap can really achieve?

I have designed tens of Bandgap circuits for different processes. But the testing result is not cheerful. By trimming, I can control the output voltage in ±20mV. It usually met the customer's requirment. But I think it's not accurate enough and want to find a way to improve it.

Accuracy depends on trimming and If one wants too accurate reference than indivudual trimming per die is necessary. Increasing trimming resolution is very costly and trimming indivudual die is also very costly. As a result always cost vs. accuracy trade of is made. One pays for what it gets. Also increasing accuracy has its limits as drifts, noise, PTV variations becomes a 'bigger and bigger' issue when required resolution increases. There is a practical and economical limit, also there is no meaning to make better than needed circuit since it costs much more :). How accurate is a BG is only determined by real need and cost, realization comes secondary.

just to insure that i correctly understood you
you mean the trimmer circuit is a combination of resistors that i control them by a certain digital word to give me the required equivalent resistance,which lets the circuit operates after manufacturing nearly as the simulated values
am i right?

Digital control has its own limitation since there is no ZERO Ohm switches awailable, also when resolution increases required area increases. Most accurate trim is TF laser trim which is not readily available. Even if one trims let say 'perfectly' result will not be as accurate as spice since funy stuff like package pressure related shifts, local and global temp gradients etc will detriment the output accuracy very quickly. In short noise floor representing not only noise but any other imperfections or error sources reached so quickly that no more improvements is meaningful (unless those cause of detriments are somehow removed or controlled so that what we called Noise floor as above gets lower, providing some room for iprovement.

I have a question about trimming circuit.

Is the trimming circuit a kind of automatic feedback circuit that can sense output error and tune the reference circuit by itself? Or just some bits to control resistance ratio, but you have to switch on/off manully(I mean trimming chip by chip)

Thanks,

I also would like to think of it that way but REFERENCE being a reference to be adjusted in a feedback loop, in order to a feedback tracking circuit to work, one will need another more accurate reference !!!! so it does not work. Like a real life situation no wonder how resourcefull we might think ourselves we always use reference material, rules etc. God provided us to do anything. Chicken an egg problem!

Design some switch circuit to change resistance to correct bandgap out voltage.

But it will change circuit's temp. curve.

Yes, practicaly there would be problems as suggested. But it does not work even theoraticaly as stated above. (Chicken and egg problem.)

So the lesson is; only design what real world requires with some calculated margin but no more. Also not only design challenges but real world challenges should be included in design constraints like product cost (die size, engineering time, testing , materials process costs etc) and hidden costs to customers (board area, power reuirement etc.).

I hope this not so design, but design flosophy helps the energetic designers before jump :)
 

johnq_hu said:
tekno1,

Do you have any idea about how accurate a CMOS bandgap can really achieve?

I have designed tens of Bandgap circuits for different processes. But the testing result is not cheerful. By trimming, I can control the output voltage in ±20mV. It usually met the customer's requirment. But I think it's not accurate enough and want to find a way to improve it.

Hi tekno1,
I would like to know what is the output voltage variation without any trimming.
 

Well maybe this helps a little with the recently posted Problems!

Since BG-References have a 1.2V output and we needed 2.7V in our Circuit, we had to amplify the BG-voltage.
To trimm this Voltage, we did not trimm the resistors of the Bandgap, but the resistors of the amplifier. So temperature coefficient is not affected by trimming!!

greetings Rocko
 

CMOS bandgap
1. use N_well + P+ or N+ .. resistor cancel
temp coefficient
2. let you bandgap bias variartion small from -40~120
some bandgap have accuracy Voltage , but
current variation is large
3. use Trim resistor but Trim circuit need mos switch Rds on should be small

by the way , cmos process BJT model is parastic
some Fabs only typ model no SS FF SF FS corner model .
 

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