[SOLVED] Verilog project idea needed

[Spectre90]

Hi
I'm new verilog however I need a project idea involving verilog.

The project involves Infinite state machine desgin model and cannot be a stop light.

I can't think of anything involving state machine so I'm asking you guys to give me some ideas.

Please help out


Thanks for reading


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And I'm implementing the project in a Xilinx basys2 fpga board
If that relative for you

 

[mrflibble]

You sure you don't mean a finite state machine? The infinite flavor would be a novel concept on fpga.

 

[D.A.(Tony)Stewart]

An infinite state machine sounds like getting stuck in traffic in Toronto

 

[Spectre90]

Yea you're right it finite[\b]

My bad.
I need some ideas for a project to do in class and has to be in verilog

 

[shaiko]

Write a simple UART.

 

[raducrv]

finite state machine for vending machine (you have multiple states like insert the money , select the product , action to give the product , dive change , timer for selection of the product

 

[coral9consulting]

or you could implement a traffic light controller. many finite states involved. this FSM would involve inputs as well as current state, so a good example of mealy FSM.

 

[Spectre90]

Well I can't implement a traffic lights because it was used in the lectures.

 

[mrflibble]

Two things:

One, I have never understood questions like "please give me an idea for a project about <topic>". Wut? I always have far too many project ideas, not a shortage. How did you cultivate your shortage of project ideas?

Two, you could make a RPN calculator implemented as an FSM. That way you could implement a simple ALU on the side as well, showing of your $k!llz. And by picking the type of calculations you support in the RPN you can put a limit on the amount of work you have to do for the ALU. So if this is a 1-2 week project you will want something a simple ALU. And if this is moooooonths then something a bit more elaborate might be in order. But I take it you will have a design review before you start coding?

 

[coral9consulting]

okay then you can look at implementing an ALU, with different states for logic, shift, arith operations. the opcode variable could be your FSM variable.

another example could be looking at implementing a serial comm protocol or other protocols like memory/cache coherence MESI protocol etc.

Hope this helps. you could also google this for more ideas.