verilog:part select of register

[anne rachel]

hello all,

i have a reg [19:0]dummy,
and i have a wire [ 7:0]dumvar,
reg[3:0] ONES,TENS,HUNDREDS
assign{HUNDREDS,TENS,ONES,dumvar}=dummy;(1)
my algorithm is as follows:
if either ONES or TENS or HUNDREDS is greater or equal to 5(0101), then i must add 0011(3) to the corresponding register i.e to either ONES or TENS or HUNDREDS. i need to replace this value in the corresponding position of dummy variable and then shift the bits of dummy register to left by one position .the new dummy value should be assigned as mentioned above in (1)
Can anyone suggest me how to do this? I have tried in many ways... but still I am not getting the expected result....



Thanks in advance

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got it !! thanks for all those who could spare few minutes to work out this....