[SOLVED] Verilog output viewing

Status
Not open for further replies.

surajdash

Junior Member level 2
Joined
Jun 21, 2011
Messages
22
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,440
Can someone tell me how do i see waveforms of signals that are neither inputs or outputs of a verilog code but are used in the program in the modules.
 

Which simulation tool are you using?
 

Check this doc:
**broken link removed**

browse down and you will see how to see the internal signals in xilinx ise tool. I will copy paste the relevant part here:
 

Thanks a lot vipinlal.
 

Status
Not open for further replies.
Cookies are required to use this site. You must accept them to continue using the site. Learn more…