u24c02
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Hi.
I need to construct an 8-bit accumulator. For this, I need an 8-bit adder.
But my ASIC vendor’s technology library has only 4-bit adders. So I construct
the accumulator.
When I synthesized the circuit, I found that there was a max-delay violation on the “Carry” signal between the two adders. To correct this, I added a flip flop in the Carry-path, as follows.
But the problem is that the output result wrong. But I don't know. what changes need to be made to this new circuit?
Please help me
I need to construct an 8-bit accumulator. For this, I need an 8-bit adder.
But my ASIC vendor’s technology library has only 4-bit adders. So I construct
the accumulator.
When I synthesized the circuit, I found that there was a max-delay violation on the “Carry” signal between the two adders. To correct this, I added a flip flop in the Carry-path, as follows.
But the problem is that the output result wrong. But I don't know. what changes need to be made to this new circuit?
Please help me
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