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Verilog design for smart card reader ISO 7816-3

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muzabyte

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Hi all,

Would anyone mind to share their Verilog code or design for smart card reader that follows the ISO 7816-3?

Please help.

Million thanks in advance.
 

Look on opencores.com if they don't have a core then there's probably a reason for that...like it will take a lot of work to develop it and nobody wants to commit that much effort (for free).
 

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