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Verilog-A model Monte Carlo simulation with spectre

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yueguoguo

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Hi all,

I have built up a verilog-a model for my device, and to study the statistics of the behavior of my device given randomly varying parameters I need to perform Monte Carlo simulations on it.
Now I know it is feasible to alter the parameters in the schematic view of my circuit which consists of my built-up device model and other circuit components.
Can somebody show me a hint about how to do the MC simulation which can assign a randomly distributed value to these parameters of my model and append the results in a final output plot (i.e., histogram or other statistical plot).

I use Cadence spectre to do my simulation.

Thanks for your help.
 

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