Verilog-a model instantiation

[rajrevanth61]

Hello Experts,

I am new to use of Verilog a models .
I have the code for mems switch using the verilog-a. Now I would like to instantiate the mems switch to work as a inverter. But I am getting error as below

ERROR (VACOMP-2259): "input vdd<<--? = 5;"

Code for inverter model instantiation is as below. (i have written this code after the endmodule statement of MEMS switch)

module inverter(in, out);

input in;
output out;
electrical in, out;

input vdd = 5;
input gnd = 0;
mems mems_1(vdd, out, in); //actual model mems(s, d, g);
mems mems_2(out, gnd, in);
endmodule

Please help me.
Thank You

 

[dick_freebird]

You do not have vdd or gnd in the module statement, yet you
call them out as inputs. Maybe this is messing up its mind. I
recommend you make them proper inputs and let the electrical
signals from above, provide the value in-the-moment.

 

[rajrevanth61]

Hello Sir,

Thanks for the reply.
I added vdd and gnd in the module statements and called them as electrical also.
Even then I am getting the same Error. What might be the problem?

---

Code Verilog - [expand]
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module inverter(in, out, vdd, gnd);
 
input in;
output out;
electrical in, out;
electrical vdd,gnd;
 
input vdd = 5;
input gnd = 0;
mems mems_1(vdd, out, in); //actual model mems(s, d, g);
mems mems_2(out, gnd, in);
endmodule

---

 

[tompham]

Hi rajrevanth61

I see you define mems_1 as a mosfet transistor but from my understand you need to have 4 terminals and define in order D,G,S,B.
I recomend you take a look at the link below. In this link they have very good example for mosfet, text and others verilogA

https://www.designers-guide.org/verilogams/

 

[rajrevanth61]

Hi rajrevanth61

I see you define mems_1 as a mosfet transistor but from my understand you need to have 4 terminals and define in order D,G,S,B.
I recomend you take a look at the link below. In this link they have very good example for mosfet, text and others verilogA

https://www.designers-guide.org/verilogams/

Hello sir,

I tried the same code of inverter instantiation with the mosfet as the switch(D G S B) by taking the code from the site which you referenced. Even then I am getting the same error. I think the syntax I used for defining VDD and GND is not correct. Can you please tell me the correct syntax to define it.?

Please help me

Thank You

 

[dick_freebird]

I don't think you want both input-assignment, and value-
assignment, applied on the same nodes.

 

[rajrevanth61]

I don't think you want both input-assignment, and value-
assignment, applied on the same nodes.

Hello Sir,

Thank You for the reply.

Can you please tell me what might be the correct way to declare VDD and GND..?

Thank You