ams 0.35u
I would imagine that you will be operating outside of the charaterised range of the libraries that you have - therefore, you can't rely 100% on the results you will get from digital tools. You can often ask a fab to characterise the standard cells in a new corner for you (with your specified Vdd), although this will cost. If you can't afford that, you will probably just want to simulate as much as you can in nanosim. (You might find it useful to compare nanosim timing with what is calculated in the digital tools - then overconstrain the design constraints to add some margin)