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VCO bias, regulator, phase noise

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hakihaki

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Hi

I'd designed VCO using replica current bias(cascode current mirror).

But now I'll design a regulator(load current - 1~2mA) for improvement to VCO phase noise.

I have a question. Which is better VCO phase noise? Is it right that the regulator have VCO phase noise to be better?

Thanks :D
 

mengcy

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you have nothing to do to improve the VCO phase noise
 

    hakihaki

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vfone

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Of course, the bias circuit can influence your VCO phase noise.

There is not a specific rule. A simple bias diode can generate more noise than an integrated regulator using tens of transistors, but also can be in the other way.

The noise generated by the bias circuit depends by its output impedance, by the filtering provided, and by the gain and the noise of the internal components.
 

    hakihaki

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