Jan 8, 2015 #1 R Ringkle Newbie level 2 Joined Dec 21, 2014 Messages 2 Helped 0 Reputation 0 Reaction score 0 Trophy points 1 Activity points 14 On Xilinx VC707 board, I choose a LVDS 200 MHz system clock provided by a fixed frequency oscillator, which connect to FPGA pins E19 and E18. But there is no clock signal input to the FPGA, ie, there is no clock source when I implement my design. How can I make this system clock work? If anyone know please help. Example design or links may helpful. https://www.xilinx.com/support/documentation/boards_and_kits/vc707/ug885_VC707_Eval_Bd.pdf Page29 Thanks Ringkle
On Xilinx VC707 board, I choose a LVDS 200 MHz system clock provided by a fixed frequency oscillator, which connect to FPGA pins E19 and E18. But there is no clock signal input to the FPGA, ie, there is no clock source when I implement my design. How can I make this system clock work? If anyone know please help. Example design or links may helpful. https://www.xilinx.com/support/documentation/boards_and_kits/vc707/ug885_VC707_Eval_Bd.pdf Page29 Thanks Ringkle
Jan 8, 2015 #2 ads-ee Super Moderator Staff member Joined Sep 10, 2013 Messages 7,944 Helped 1,822 Reputation 3,654 Reaction score 1,808 Trophy points 1,393 Location USA Activity points 60,207 Ringkle said: But there is no clock signal input to the FPGA, ie, there is no clock source when I implement my design. Click to expand... What do you mean by this? Are we supposed to guess what you did in your code? Instead of asking for someone to post an example design post your code that doesn't work. If I had to guess...you probably didn't instantiate an ibufgs for that differential clock.
Ringkle said: But there is no clock signal input to the FPGA, ie, there is no clock source when I implement my design. Click to expand... What do you mean by this? Are we supposed to guess what you did in your code? Instead of asking for someone to post an example design post your code that doesn't work. If I had to guess...you probably didn't instantiate an ibufgs for that differential clock.
Jan 9, 2015 #3 R Ringkle Newbie level 2 Joined Dec 21, 2014 Messages 2 Helped 0 Reputation 0 Reaction score 0 Trophy points 1 Activity points 14 ads-ee said: What do you mean by this? Are we supposed to guess what you did in your code? Instead of asking for someone to post an example design post your code that doesn't work. If I had to guess...you probably didn't instantiate an ibufgs for that differential clock. Click to expand... Thanks for your reply. To verify the clock source, I just apply the 200 MHz clock to a frequency divider to drive a led, with IBUFGDS , but it doesn't work. I'm a beginner of VC707, are there any key points I missed?
ads-ee said: What do you mean by this? Are we supposed to guess what you did in your code? Instead of asking for someone to post an example design post your code that doesn't work. If I had to guess...you probably didn't instantiate an ibufgs for that differential clock. Click to expand... Thanks for your reply. To verify the clock source, I just apply the 200 MHz clock to a frequency divider to drive a led, with IBUFGDS , but it doesn't work. I'm a beginner of VC707, are there any key points I missed?