Just to expand on what Klaus has said, if you're worrying about killing someone, there's A LOT MORE you need to be concerned with. What if your microprocessor software has a hidden bug and outputs the wrong data? All the EMC filtering in the world isn't going to fix that. You might need some external hardware just to prevent, for example, two signals being active at the same time. (I once destroyed an expensive amplifier in a radar because the transmitter and receiver were enabled at the same time. A simple logic gate would have prevented that from ever happening.) You also need software checks in place to prevent dangerous situations from happening. You can also use methods like triple-redundancy to mitigate noise problems.
As far as which of your latch or shift-register approaches is less susceptible to noise? They're identical. For a given process (CMOS, TTL) the susceptibility to noise is pretty much the same for all inputs. For example, for TTL less than 0.8 V is a logic zero; greater than 2V is a logic one. Anything in between those levels is indeterminate. If you have noise spike of greater than 2V on a clock line or a latch-control line, you've got a problem. Even if you have a spike of, say, 0.9V, you might have a problem.