FvM - Would this work?Your circuit involves both drawing and principle design faults.
I guess, you meaned to connect the PMOS switch between 24V and VCC pin rather than make it short the power supply, distroying itself. If so, the PMOS switch has to be controlled by a 24V tolerant open drain/open collector driver, surely not an uP GPIO pin. Usually an external transistor is utilized as level converter.
Now you fixed the drawing error. But the pull-up has to be connected to +24V to switch the PMOS transistor off. You'll know that the µP can't drive 24V.
A possible solution is a NMOS transistor in common gate configuration. S to µP output, G to +3V3, D to PMOS gate/pull-up. Or a NPN transistor in common base with additional emitter series resistor. Or an inverting transistor level converter in common source/emitter configuration.