Using IR2110, HO does not switch on

[EC.Engineer]

I am working on a multi-level invertor and using IR2110 for gate drive but I am facing a problem with the High side output. It does not seem to switch on. Please see the attached Proteus design for the basic test setup.

Is there anything I am missing in the connections? I am trying to follow the design given by @Tahmid on https://tahmidmc.blogspot.com/2013/01/using-high-low-side-driver-ir2110-with.html

 

[KlausST]

Hi,

what´s the HIN and LIN input voltage levels? Do they meet IR2112 sepcifications?

What is VDD voltage used for? I see only two capacitors connected to it.

Klaus

 

[EC.Engineer]

HIN and LIN are 5 Volts.

VDD is actually for IR2110. Proteus does not have IR2110 model and I am just using IR2112 for simulation purpose.

 

[KlausST]

Hi,

HIN and LIN are 5 Volts.

Do they meet IR2112 sepcifications?

Reading the datasheet helps:

--> 5V is not enough, if you really connected VDD to 12V.

Either use a higher input level, or connecd IR2110_VDD to 5V.


****

VDD is actually for IR2110.

..but it is not connected in your circuit.

We can not know....

Klaus

 

[EC.Engineer]

Hi Klaus

Thank you for the reply. For some reason, adding a NOT gate seems to work in the simulation but direct input from the signal generator does not work. I will have to test it once again on the actual hardware tomorrow. In my case, the inputs are coming from a microcontroller.



VDD is the input side voltage and it can range from 3V upto 20V, and HIN and LIN are relative to it.

 

[FvM]

The point is that Proteus is a mixed signal simulator, some signals are binary logic states and others analog voltages. The conversion happens automatically and is not always obvious. It seems that IR2110 either ignores input thresholds when it's driven by a logic gate or a microprocessor. Or it's not working correctly with analog input signals. The IR2112 VDD terminal is missing in the simulation symbols, so we don't know which VDD value is assumed.

In a real hardware, it's necessary to connect the IR2210 or IR2112 VDD node to the logic supply voltage, otherwise it won't work.

 

[EC.Engineer]

In a real hardware, it's necessary to connect the IR2210 or IR2112 VDD node to the logic supply voltage, otherwise it won't work.

Thank you for the reply. Yes, I am connecting VDD to the logic supply voltage.


The mosfets are working on the hardware, and also in the simulation. I am now facing a different problem related to interaction between Q4 and Q1. They seem to cause some sort of a short in the circuit when both of them are on. Disconnecting either of them works fine but I need them both to generate the staircase signal.


Should I create a separate thread for this issue?

I am attaching the complete simulation for reference.

 

[KlausST]

Hi,

The true problem isn't shown in your given schematic.

The problem (I assume) is in the combination of gate_driver circuit and your cascaded mosfets.

--> show the complete circuit.

Klaus

 

[FvM]

It's simply not possible to build multi-level inverters with bootstrap gate driver supply. IR2110 needs the VS node periodically switched to ground, this doesn't happen for Q1 and Q3, they need isolated gate driver supplies.

I don't use Proteus and I guess, many professional Edaboard members neither. You should better post a complete schematic and related waveforms.

 

[Okada]

Thamid in one of this blogs mentioned that there should be always a 10k resistor between Gate and Source.

 

[FvM]

Thamid in one of this blogs mentioned that there should be always a 10k resistor between Gate and Source.

Yes he does. The least we can say that this suggestion is unrelated to the problems discussed in this thread.

 

[EC.Engineer]

Hi,

The true problem isn't shown in your given schematic.

The problem (I assume) is in the combination of gate_driver circuit and your cascaded mosfets.

--> show the complete circuit.

Klaus

It might be possible. I am still trying to find out the issue.

Below is the complete circuit and the waveforms.


IR2110 input waveforms


IR2110 output waveforms


g2 wave is not shown. It is exactly the complement of g1.

It's simply not possible to build multi-level inverters with bootstrap gate driver supply. IR2110 needs the VS node periodically switched to ground, this doesn't happen for Q1 and Q3, they need isolated gate driver supplies.

I don't use Proteus and I guess, many professional Edaboard members neither. You should better post a complete schematic and related waveforms.

Do you suggest using TLP250 as isolated gate driver?

 

[FvM]

TLP250 can be a solution for g1 and g3 driver.

I am now facing a different problem related to interaction between Q4 and Q1.

I see that you are activating Q4 and Q1 simultaneously. This creates a short through Q2 internal body diode. Either your multilevel topology is wrong, or you are driving it incorrectly.