using floats in vhdl - cannot use real data type

Similar threads

• S

  Cannot identify inferring latches in code

  • Started by sims0702
  • Apr 12, 2024
  • Replies: 10

  PLD, SPLD, GAL, CPLD, FPGA Design
• L

  Image Encryption and Decryption using VHDL

  • Started by Lightning89
  • Feb 14, 2024
  • Replies: 0

  PLD, SPLD, GAL, CPLD, FPGA Design
• I

  concatenation in VHDL?

  • Started by irfanraina1@123
  • Feb 27, 2024
  • Replies: 2

  PLD, SPLD, GAL, CPLD, FPGA Design
• H

  How to store Coco training data set in Pynqz2 board

  • Started by hudda
  • May 25, 2024
  • Replies: 1

  PLD, SPLD, GAL, CPLD, FPGA Design
• VHDL. rewrite FOR LOOP using FOR GENERATE

  • Started by 4pi
  • Oct 26, 2023
  • Replies: 6

  PLD, SPLD, GAL, CPLD, FPGA Design