syedshan
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Dear all,
I want to inquire about using the User Interface connecting method about the Xilinx MIG developed Memory controller.
Hence my question is, Is the method of data returning resembles the FIFO, it means we cannot use this design for storing the data for later use at multiple times. e.g. in FIFO once the data is read, we cannot re-read that location
If so then what is the need for app_addr[] port. Is it only for writing the data to the DDR3 using UI and read will be STRICTLY done in FIFO method
Looking for answers.
Bests,
Shan
I want to inquire about using the User Interface connecting method about the Xilinx MIG developed Memory controller.
Hence my question is, Is the method of data returning resembles the FIFO, it means we cannot use this design for storing the data for later use at multiple times. e.g. in FIFO once the data is read, we cannot re-read that location
If so then what is the need for app_addr[] port. Is it only for writing the data to the DDR3 using UI and read will be STRICTLY done in FIFO method
Looking for answers.
Bests,
Shan