Use of block placement tools

[Audette]

Hi,

I am wondering if anyone can tell me areas where placement tools for macros/blocks may be of use? I am thinking of designs that may contain either pure macro cells or ones that may have a minimal amount of standard cells along with macro cells.

- Audette

 

[nikhilele]

what is this ... i am not getting i think this is not electronics.. related

 

[Audette]

OK - I am sorry if I am not making myself very clear.

This is related to EDA - electronic design automation.

It is to do with chip designing - and the place and route side of it.

Standard cells and macro cells are what makes up the chip - and I am looking for areas where only macro cells may be used.

Hope this clears it up a bit.

 

[forkschgrad]

it's possible with SDL (schematic driven layout) feature.