use of and gate in clock gating cell

[ajesh.nitc]

I have a doubt. Can an and gate be used in clock gating cell instead of flip flop..

 

[manajel1]

yeah possible this is the latch-free mode in clock-gating. it s has the probleme of gliching in the enable signal, i recommand u to use the latch-based mode (using a latch's flip flop)