ajesh.nitc
Newbie level 2
I have a doubt. Can an and gate be used in clock gating cell instead of flip flop..
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use of and gate in clock gating cell
- Thread starter ajesh.nitc
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manajel1
Junior Member level 2
yeah possible this is the latch-free mode in clock-gating. it s has the probleme of gliching in the enable signal, i recommand u to use the latch-based mode (using a latch's flip flop)
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