agaripcan6223
Newbie level 1
Hi all;
I have a question about using ip core ram(RAM:1-PORT) in altera quartus. In my designs last stage i want to keep output bit in memory.
For this, I am using altera IP core ram.Can i see stored values in the memory when i run the design with simulation tools(modelsim)?
Thanks...
I have a question about using ip core ram(RAM:1-PORT) in altera quartus. In my designs last stage i want to keep output bit in memory.
For this, I am using altera IP core ram.Can i see stored values in the memory when i run the design with simulation tools(modelsim)?
Thanks...