I have a question about using ip core ram(RAM:1-PORT) in altera quartus. In my designs last stage i want to keep output bit in memory.
For this, I am using altera IP core ram.Can i see stored values in the memory when i run the design with simulation tools(modelsim)?
If you have written some values to the RAM, yes you can see them or read them out.
If you sim model initializes your RAM, then you get to see those values or read them out.