[SOLVED] Unknown operator in P.Ashenden book can someone explain

Status
Not open for further replies.

wtr

Full Member level 5
Joined
May 1, 2014
Messages
299
Helped
29
Reputation
58
Reaction score
25
Trophy points
1,308
Activity points
4,108
Hello,

Background - After 10 years in the business I was writing my own collaborations of VHDL rules/ best practices etc. I decided to review one of the books on my shelf, "The student Guide to VHDL" by Peter J. Ashenden.

Chapter 7.1 Package Declarations, Figure 7-1 and Figure 7.2


Code VHDL - [expand]
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
package cpu_types is
  constant word_size : positive := 16;
  constant address_size : positive := 24;
  subtype word is bit_vector(word_size-1 downto 0);
  subtype address is bit_vector(address_size-1 downto 0);
  type status_value is (halted, idle, fetch, mem_read, mem_write, io_read, io_write, int_ack);
end package cpu_types;
 
entity address_decoder is
  port(
    addr : in work.cpu_types.address; 
    status : in work.cpu_types.status_value; 
    mem_sel, int_sel, io_sel : out bit);
end entity address_decoder;
 
architecture functional of address_decoder is
    constant mem_low  : work.cpu_types.address := x"000000";
    constant mem_high : work.cpu_types.address := x"EFFFFF";
    constant io_low   : work.cpu_types.address := X"F00000";
    constant io_high  : work.cpu_types.address := x"FFFFFF";
begin
    mem_decoder :
        mem_sel <= '1' when (work.cpu_types."="(status, work.cpu_types.fetch) or
                       when (work.cpu_types."="(status, work.cpu_types.mem_read) or



What is this ."=" opreator? I see no infix function declared that overloads =.

If I was writing this myself using an expanded selected names (because the point of the lesson is why we use..."use") then I would have done

Code VHDL - [expand]
1
when status=work.cpu_types.fetch

 

"=" is the equals function. It is in double quotes because it is one of the VHDL default operators, and "=" is implicity defined for all types in the package the type is decalred in. The fact it has a . infront of it means it is being pull directly from the cpu_types package, and it is being called explitly like a normal function.

There is no actual requirement to do this here, your example would have worked fine, but there are circumstances where it may be needed.

Here is an example I have had. When you include packages, the most local takes precidence. So, consider the following library imports (from VHDL 2008):


Code VHDL - [expand]
1
2
3
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std_unsigned.all;



Std_logic_vector is defined in std_logic_1164 package, and hence an implicit "=" function is defined for std_logic_vector. But numeric_std_unsigned explicitly defines an "=" function to compare two std_logic_vectors numerically. This will override the default implementation because it is implicit. If std_logic_1164 had an explicit "=" function, you would get a clash when you did this:

Code:
if a = b then

and you would get and error explaining that because it doesnt know if you want the std_logic_1164 "=" , or the numeric_std_unsigned "=", you get neither and get an error. But this doesnt happen because the numeric_std_unsigned explicity overrides the implicit one by default.

So my issue arrose when I wanted to compare a std_logic_vector to a meta value:


Code VHDL - [expand]
1
2
3
4
5
6
7
8
9
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std_unsigned.all;
 
....
 
if some_slv = "UUUUUUUU" then
 
  -- this will never occur



Here, because its using the numeric_std_unsigned "=" function, the compare always returns false for meta values. You then need to be explicit about what function to call:


Code VHDL - [expand]
1
2
3
4
5
6
7
8
9
10
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std_unsigned.all;
 
....
 
if ieee.std_logic_1164."="(some_slv, "UUUUUUUU") then
 
-- Or you can do this:
if some_slv ieee.std_logic_1164."="  "UUUUUUUU" then



- - - Updated - - -

There are quite a few things that come for free in the same region when you declare a type:

All types get equality operators "=", "<", ">" etc
All File types get FILE_OPEN, FILE_CLOSE, ENDFILE procedures
Access Types get a DEALLOCATE procedure.
 

    ads-ee

    Points: 2
    Helpful Answer Positive Rating

    wtr

    Points: 2
    Helpful Answer Positive Rating

    dpaul

    Points: 2
    Helpful Answer Positive Rating
Holy smokes,

TrickeyDicky you should write a book.

I hadn't noticed that he was selectively directing a function, in addition to the types. I'm so used to seeing an infix function used as a (func) b, that I completely forgot the written implementation is "func" (a : type, b : type). However what really got me confused was that the package.path."func" didn't have an overloading of the equal sign....or at least one that I could explicitly see. I did not know about all those freebies when you declare a type.
 

Just scanning the 2008 LRM. All scalar types also get MINIMUM, MAXIMUM and to_string functions for free
 

Status
Not open for further replies.

Similar threads

Cookies are required to use this site. You must accept them to continue using the site. Learn more…